1. Field of the Invention
The present invention relates to an image display apparatus implemented with a mirror device for modulating light. More particularly, this invention relates to an image display apparatus implemented with a mirror device comprises mirror elements each includes an elastic hinge manufactured with special structure for supporting the mirror.
2. Description of the Related Art
Even though there are significant advances of the technologies for implementing an electromechanical mirror device as a spatial light modulator (SLM) in recent years, there are still limitations and difficulties when current technologies according to the state of the art are applied to provide a high quality image. Specifically, when the images are digitally controlled, the image quality is adversely affected due to the limitation that the images are not displayed with sufficient number of gray scales.
An electromechanical mirror device is drawing a considerable interest and commonly employed as a spatial light modulator (SLM) in the image project apparatuses. The electromechanical mirror device is typically implemented with a “mirror array” comprising a large number of mirror elements. In general, the number of mirror elements may range from 60,000 to several millions of micromirror pieces are manufactured as two-dimensional array on a surface of a substrate in an electromechanical mirror device.
Referring to FIG. 1A for an image display system 1 disclosed in U.S. Pat. No. 5,214,420 that comprises a screen 2. The display system 1 further includes a light source 10 to project an illumination light for displaying images on the screen 2. The illumination light 9 from the light source is further focused and directed toward a lens 12 by a mirror 11. Lenses 12, 13, and 14 function together as a beam culminator to culminate light 9 into a culminated light 8. A spatial light modulator (SLM) 15 is controlled on the basis of data input by a computer 19 via a bus 18 to selectively redirect portions of light from a path 7 toward an enlarger lens 5 and onto screen 2. The SLM 15 is implemented with a mirror array comprising large number of mirror 33 each includes a deflectable reflective element shown as elements 17, 27, 37, and 47 depicted in FIG. 1B. Each mirror 33 is connected by a hinge 30 on a surface 16 of a substrate in the electromechanical mirror device as shown in FIG. 1B. When the element 17 is in one position, a portion of the light from the path 7 is redirected along a path 6 to lens 5 where it is enlarged or spread along the path 4 to impinge on the screen 2 to display an illuminated pixel 3. When the element 17 is in another position, the light is redirected away from screen 2 and hence the pixel 3 is displayed as a dark pixel on the display screen 2.
The mirror device comprises a plurality of mirror elements to function as spatial light modulator (SLM) wherein each mirror element comprises a mirror and electrodes. A voltage applied to the electrode(s) generates a coulomb force between the mirror and the electrode(s) to control the mirror to tilt to an inclined angle. According to a common term used in this specification, the mirror is “deflected” to an angular position for describing the operational condition of a mirror element.
When a voltage applied to the electrode(s) controls the mirror to deflect to a controlled angular position, the deflected mirror also reflects an incident light to a controlled direction. The direction of the reflected light is therefore controlled in accordance with the deflection angle of the mirror and that in turn is controlled by a voltage applied to the electrode. The present specification refers to a state of the mirror as an ON state when the mirror reflects substantially the entirety of an incident light a projection path designated for image display and as an OFF state when the mirror reflects the incident light to a direction away from the designated projection path for image display.
Furthermore, there is a specific ratio of an amount of light reflected to the display screen by the mirror operated in an ON state relative to an amount of light reflected by the mirror operated at an OFF state. Furthermore, an “Intermediate state” is referred to a condition when the mirror reflects an amount of light to the projection path that is smaller than the amount of light of the ON state but greater than the amount of light of the OFF state.
The terminology of present specification defines an angle of rotation along a clockwise (CW) direction as a positive (+) angle and that of counterclockwise (CCW) direction as negative (−) angle. A deflection angle is defined as zero degree (0°) when the mirror is in the initial state with no voltage applied to the electrode to function as a reference of mirror deflection angle.
Most of the conventional image display devices such as the devices disclosed in U.S. Pat. No. 5,214,420 implements a dual-state mirror control technique that controls the mirrors in a state of either ON or OFF. The quality of an image display is limited due to the limited number of gray scales when the mirrors are controlled to operate only at an ON or OFF states. Specifically, in a conventional control circuit that applies a PWM (Pulse Width Modulation), the quality of the image is limited by the LSB (least significant bit) or the least pulse width as a minimum length of time that a mirror can be controlled to operate in an ON or OFF state. Since the mirror is controlled to operate in either the ON or OFF state, the conventional image display apparatus is limited by the LSB and not able to operate the mirror with a pulse width shorter than the control duration allowable based on the LSB. The least amount of controllable light defines the resolution of the gray scale is determined by the light reflected during the time duration based on the least pulse width. The limited number of gray scales thus leads to a degradation of the quality of the displayed image.
Specifically, FIG. 1C exemplifies a control circuit for controlling a mirror element according to the disclosure in the U.S. Pat. No. 5,285,407. The control circuit includes a memory cell 32. Various transistors are referred to as “M*” where “*” designates a transistor number and each transistor is an insulated gate field effect transistor. Transistors M5 and M7 are p-channel transistors; while transistors M6, M8, and M9 are n-channel transistors. The capacitances C1 and C2 represent the capacitive loads in the memory cell 32. The memory cell 32 includes an access switch transistor M9 and a latch 32a, which is based on a typical Static Random Access switch Memory (SRAM) design. The transistor M9 connected to a Row-line receives a data signal via a Bit-line. The memory cell 32 written data is accessed when the transistor M9 which has received the ROW signal on a Word-line is turned on. The latch 32a consists of two cross-coupled inverters, i.e., M5/M6 and M7/M8, which permit two stable states, that is, a state 1 is Node A high and Node B low, and a state 2 is Node A low and Node B high.
The mirror is driven by a voltage applied to the address electrode connected to an address electrode and is held at a predetermined deflection angle on the address electrode. An elastic “landing chip” is formed at a portion on the address electrode, which makes the address electrode contact with mirror, and assists the operation for deflecting the mirror toward the opposite direction when a deflection of the mirror is switched. The landing chip is designed as having the same potential with the address electrode, so that an electric short circuit is prevented when the address electrode is in contact with the mirror.
Each mirror formed on a device substrate has a square or rectangular shape and each side has a length of 4 to 15 μm. In this configuration, a reflected light that is not controlled for purposefully applied for image display may however inadvertently generated by reflections through the gap between adjacent mirrors. The contrast of an image display generated by adjacent mirrors is degraded due to the reflections generated not by the mirrors but by the gaps between the mirrors. As a result, a quality of the image display is adversely affected due to a reduced contrast. In order to overcome such problems, the mirrors are arranged on a semiconductor wafer substrate with a layout to minimize the gaps between the mirrors. One mirror device is generally designed to include an appropriate number of mirror elements wherein each mirror element is manufactured as a deflectable mirror on the substrate for displaying a pixel of an image. The appropriate number of elements for displaying image is in compliance with the display resolution standard according to a VESA Standard defined by Video Electronics Standards Association or television broadcast standards. In the case in which the mirror device has a plurality of mirror elements corresponding to Wide eXtended Graphics Array (WXGA), whose resolution is 1280 by 768, defined by VESA, the pitch between the mirrors of the mirror device is 10 μm and the diagonal length of the mirror array is about 0.6 inches.
The control circuit, as illustrated in FIG. 1C, controls the micromirrors to switch between two states, and the control circuit drives the mirror to oscillate to either an ON or OFF deflection angle (or position) as shown in FIG. 1A.
The minimum intensity of light controllable to reflect from each mirror element for image display, i.e., the resolution of gray scale of image display for a digitally controlled image display apparatus, is determined by the least length of time that the mirror is controllable to be held in the ON position. The length of time that each mirror is controlled to be held in an ON position is in turn controlled by multiple bit words.
FIG. 1D shows the “binary time periods” in the case of controlling the SLM by four-bit words. As shown in FIG. 1D, the time periods have relative values of 1, 2, 4, and 8 that in turn determine the relative intensity of light of each of the four bits, where “1” is the least significant bit (LSB) and “8” is the most significant bit. According to the PWM control mechanism, the minimum intensity of light that determines the resolution of the gray scale is a brightness controlled by using the “least significant bit” which holds the mirror at an ON position for the shortest controllable length of time.
For example, assuming n bits of gray scales, one time frame is divided into 2n−1 equal time periods. For a 16.7-millisecond frame period and n-bit intensity values, the time period is 16.7/(2n−1) milliseconds.
Having established these times for each pixel of each frame, pixel intensities are quantified such that black is a 0 time period, the intensity level represented by the LSB is 1 time period, and the maximum brightness is 2n−1 time periods. Each pixel's quantified intensity determines its ON-time during a time frame. Thus, during a time frame, each pixel with a quantified value of more than 0 is ON for the number of time periods that correspond to its intensity. The viewer's eye integrates the pixel brightness so that the image appears the same as if it were generated with analog levels of light.
For controlling deflectable mirror devices, the PWM applies data to be formatted into “bit-planes”, with each bit-plane corresponding to a bit weight of the intensity of light. Thus, if the brightness of each pixel is represented by an n-bit value, each frame of data has the n-bit-planes. Then, each bit-plane has a 0 or 1 value for each mirror element. According to the PWM control scheme described in the preceding paragraphs, each bit-plane is independently loaded and the mirror elements are controlled according to bit-plane values corresponding to the value of each bit during one frame. Specifically, the bit-plane according to the LSB of each pixel is displayed for 1 time period.
When adjacent image pixels are displayed with a very coarse gray scale caused by great differences in the intensity of light, thus, artifacts are shown between these adjacent image pixels. That leads to the degradations of image quality. The image degradations are especially pronounced in the bright areas of image where there are “bigger gaps” between of the gray scales of adjacent image pixels. The artifacts are generated by technical limitations in that the digitally controlled image does not provide a sufficient number of the gray scale.
As the mirrors are controlled to operate in a state of either ON or OFF, the intensity of light of a displayed image is determined by the length of time each mirror is in the ON position. In order to increase the number of gray scales of a display, the switching speed of the ON and OFF positions for the mirror must be increased. Therefore the digital control signals need be increased to a higher number of bits. However, when the switching speed of the mirror deflection is increased, a stronger hinge for supporting the mirror is necessary to sustain the required number of switches between the ON and OFF positions for the mirror deflection. In order to drive the mirrors with a strengthened hinge, a higher voltage is required. The higher voltage may exceed twenty volts and may even be as high as thirty volts. The mirrors produced by applying the CMOS technologies are probably not appropriate for operating the mirror at such a high range of voltages, and therefore DMOS mirror devices may be required. In order to achieve a higher degree of gray scale control, more complicated production processes and larger device areas are required to produce the DMOS mirror. Conventional mirror controls are therefore faced with a technical problem in that accuracy of gray scales and range of the operable voltage have to be sacrificed for the benefits of a smaller image display apparatus.
There are many patents related to light intensity control. These patents include U.S. Pat. Nos. 5,589,852, 6,232,963, 6,592,227, 6,648,476, and 6,819,064. There are further patents and patent applications related to different light sources. These patents include U.S. Pat. Nos. 5,442,414, 6,036,318 and Application 20030147052. Also, U.S. Pat. No. 6,746,123 has disclosed particular polarized light sources for preventing the loss of light. However, these patents or patent applications do not provide an effective solution to attain a sufficient number of the gray scale in the digitally controlled image display system.
Furthermore, there are many patents related to a spatial light modulation including U.S. Pat. Nos. 2,025,143, 2,682,010, 2,681,423, 4,087,810, 4,292,732, 4,405,209, 4,454,541, 4,592,628, 4,767,192, 4,842,396, 4,907,862, 5,214,420, 5,287,096, 5,506,597, and 5,489,952. However, these inventions do not provide a direct solution for a person skilled in the art to overcome the above-discussed limitations and difficulties.
In view of the above problems, US Patent Application 20050190429 has disclosed a method for controlling the deflection angle of the mirror to express higher gray scales of an image. In this disclosure, the intensity of light obtained during the oscillation period of the mirror is about 25% to 37% of the intensity of light obtained while the mirror is held in the ON position continuously.
According to this control process, it is not necessary to drive the mirror at a high speed. Also, it is possible to provide a higher number of the gray scale using a hinge with a low elastic constant. Hence, such a control makes it possible to reduce the voltage applied to the address electrode.
An image display apparatus using the mirror device described above is broadly categorized into two types: a single-plate image display apparatus implemented with only one spatial light modulator and a multi-plate image display apparatus implemented with a plurality of spatial light modulators. In the single-plate image display apparatus, a color image is displayed by changing, in turn, the color (i.e. frequency or wavelength) of projected light over time. In a multi-plate the image display apparatus, a color image is displayed controlling the multiple spatial light modulators, corresponding to beams of light having different colors (i.e. frequencies or wavelengths), to modulate and combine the beams of light continuously.
For projection apparatuses there has been an increasing demand for high-resolution definitions, such as a full high definition (Full-HD; 1920×1080 pixels) television these days, prompting the development of higher resolution display techniques.
A mirror device is usually the spatial light modulator used for such a projection apparatus. The mirror device is comprised of a mirror array of two to eight million mirror-elements in two dimensions on a device substrate.
The size of a mirror of the mirror element of a common mirror device is 11 μm square. A memory cell for driving the mirror is comprised within the substrate. Further, the mirror is controlled by setting the operating voltage of the memory cell, or the drive voltage for deflecting the mirror, to “5” volts or higher. Further, such a mirror is generally supported by an elastic hinge.
A common mirror device used for high definition (Full-HD) has the diagonal size of 24.13 mm (0.95 inches), with a mirror pitch of 11 μm. An XGA-size mirror device has the diagonal size of 17.78 mm (0.7 inches) of the mirror array, with the mirror pitch of 14 μm.
FIG. 2 is a diagonal view of a mirror device arraying, in two-dimension on a device substrate, mirror elements controlling a reflection direction of incident light by deflecting the mirror.
The mirror device 200 shown in FIG. 2 is constituted by arraying a plurality of mirror elements 300, each of which is constituted by an address electrode (not shown in the drawing herein), elastic hinge (not shown) and a mirror supported by the elastic hinge, lengthwise and crosswise (i.e., in two-dimension) on a device substrate 303.
FIG. 2 illustrates the case of arraying a plurality of mirror elements 300 comprising square mirrors 302 lengthwise and crosswise at equal gaps on the device substrate 303.
The mirror 302 can be controlled by applying a voltage to the address electrode provided on the device substrate 303. In FIG. 2, a deflection axis 201 for deflecting the mirror 302 is indicated by the dotted line. The light emitted from a light source 301 is incident to the mirror 302 so as to be orthogonal or diagonal relative to the deflection axis 201.
Specifically, in the present specification document, the distance between the deflection axes 201 of mutually adjacent mirrors 302 is termed as “pitch” and the distance between the mutually adjacent mirrors 302 is termed as “gap”.
The following is a description of an operation of the mirror element 300 by referring to the cross-sectional line II-II of the mirror element 300 of the mirror device 200 shown in FIG. 2.
FIGS. 3A and 3B are cross-sectional diagrams of the line II-II indicated in FIG. 2.
The mirror element 300 comprises a mirror 302, an elastic hinge 304 for supporting mirror 302, two address electrodes 307a and 307b, which placed opposite mirror 302, and a first and second memory cell, both for applying a voltage to the address electrodes 307a and 307b in order to operate the mirror 302 under a controllable deflection state.
The drive circuits for each of the memory cells are commonly placed inside the device substrate 303 to control each memory cell by the signal according to the image data thus controlling the deflection angle of mirror 302 for reflecting and modulating the incident light.
FIG. 3A is a cross-sectional diagram for illustrating an ON state of a mirror element 300 when the deflectable mirror 302 reflects the incident light to a projection optical system.
A signal [0, 1] applied to a memory cell represents a voltage “V=0” applied to the address electrode 307a on one side and another voltage V=Va applied to the address electrode 307b on the other side. As a result, a Coulomb force is generated by the voltage Va applied to the electrode 307b to draw the mirror 302 to deflect from a horizontal state to incline to the direction of the address electrode 307b . . . . The mirror 302 is controlled to operate in an ON state to reflect the incident light emitted from a light source 301 to the projection optical system. Specifically an insulation layer 306 is formed to cover over the device electrode, i.e., the address electrodes 307a and 307b, and a hinge electrode 305 connected to the elastic hinge 304 is grounded through a Via connector not shown in a drawing formed in insulation layer 306.
FIG. 3B is a cross-sectional diagram for illustrating an OFF state of a mirror element 300 when the deflectable mirror 302 reflects the incident light away from the projection optical system.
A signal [1, 0] applied to a memory cell represents a voltage V=Va applied to the address electrode 307a on one side and another voltage “V=0” applied to the address electrode 307b on the other side. As a result, a Coulomb force is generated by the voltage Va applied to the electrode 307a to draw the mirror 302 to deflect from a horizontal state to incline to the direction of the address electrode 307a. The mirror 302 is controlled to operate in an OFF state to reflect the incident light outside of the light path projecting to the projection optical system.
Specifically, the Coulomb force generated between the mirror 302 and address electrode 307a, or 307b, may be represented by the following expression:
  F  =            k      ′        ⁢                            eS          2                ⁢                  X          2                            2        ⁢                  h          2                    (1);
where “S” is the area of the address electrode 307a or 307b, “h” is the distance between the mirror 302 and address electrode 307a or 307b, “e” is the permittivity between the mirror 302 and address electrode 307a or 307b, “V” is the voltage applied to the address electrode 307a or 307b, and “k′” is a correction coefficient.
FIG. 4 is a cross-sectional diagram illustrating the reflection of incident light onto a mirror device 200.
Each of the mirror elements 300 in the mirror device 200 shown in FIG. 4 comprises a mirror 302 and hinge 304 juxtaposed on the device substrate 303 enclosed in a package 308. The package 308 is formed with a shape of a hollow rectangle with an open top, and the top is covered with a cover glass 309, which allows the transmission of light.
The mirror device as described above can be produced through the same processes as commonly applied in the production process of a semiconductor device. The production processes mainly includes processing steps of chemical vapor deposition (CVP), photolithography, etching, doping, and chemical mechanical polishing (CMP).
Practically, in order to respond to a higher resolution of the image projected in a projection apparatus, the number of mirror elements must be increased, requiring a reduction in size of the mirror of the mirror element.
A reduction in mirror size necessitates an elastic hinge that is extremely thin and small, having a thickness ranging from 100- to 1000 angstrom and having a width ranging from 1.2- to 0.3 μm. This requires that the area for fixing the elastic hinge onto the address electrode becomes very small, making it very difficult to fix the elastic hinge securely so as to prevent the hinge from being detached by an elastic force applied to its base. Furthermore, in the case of a perpendicular elastic hinge, it functions as a cantilevered spring, which is fixed only at the base, which endures a large force.
Additionally, in the processes of forming an elastic hinge, the etching is repeated, and therefore precautions must be taken to prevent the base of the hinges or regions near the bottom portions of the elastic hinge from being cut or corroded. Specifically, there are additional difficulties due to the facts that when the sacrifice layer is made of silicon dioxide (SiO2), hydrogen fluoride (HF) is used as etchant, the base and the lower portions as fixed part of an elastic hinge may easily be exposed and damaged and/or corroded. Therefore, the current technologies of manufacturing the mirror devices implemented as the spatial light modulator is confronted with difficulties and limitations. Such limitations and difficulties are still not resolved by the above-discussed patents and disclosures and further in view of the additional patents as listed below.
The following patents are related to the structures of the conventional mirror devices and the techniques for producing the mirror devices. U.S. Pat. No. 7,183,618 discloses a hinge formed in the opening part of a pedestal. U.S. Pat. No. 7,273,693 discloses a mirror device comprising a mirror support. U.S. Pat. Nos. 5,673,139; 6,128,121; and 7,068,417 disclose a vertical hinge. U.S. Pat. No. 7,022,249 discloses a method for forming the base of a hinge and U.S. Pat. No. 5,497,262 discloses a horizontal hinge structure. However these disclosures have not disclosed configurations or manufacturing methods to overcome the above-discussed difficulties or limitations.